VIA Interview - August 2001

With the immense popularity surrounding VIA's P4X266 chipset, we decided to do a quick interview with one of the faces behind the company. Richard Brown is VIA's Director of Marketing and he was kind enough to answer a few of our questions. VIA's responses are indented.

1) Obviously with NVIDIA's announcement of the nForce, the entire enthusiast community is wondering if we'll see a high performance competitor to the nForce from VIA? Is Dual Channel DDR a possibility for the future? And if so, how soon can we expect it?

We think nForce with a Dual Channel DDR structure has a market positioning issue that means it will more likely compete with standalone Nvidia graphics chips in the higher end segment of the market instead of in the mainstream SMA chipset market. To support Dual Channel DDR, you need a much larger and non-standard chipset package, as well as at least a six-layer motherboard design. That gives you a huge cost disadvantage compared to the mainstream STD chipset package and a four-layer motherboard. If you position the nForce in a single channel 64-bit DDR environment, its performance is in the ballpark of our forthcoming DDR SMA chipsets, which we still see as a memory bandwidth bond design. In this case, we can use a less sophisticated graphics core to achieve similar or even better graphics performance compared to a single channel DDR nForce.

2) Historically VIA has positioned themselves as a low-end, volume core logic manufacturer. With Intel's slip ups at the end of 1999 VIA was thrust into the performance PC market segment. What are VIA's plans to remain competitive in this segment? With NVIDIA closing in on the top end and competitors like ALi and SiS offering cheaper solutions, what is VIA doing to not only hold their ground but also remain competitive with these other manufacturers?

I wouldn't quite agree with your comment that Intel's slip ups thrust us into the performance PC market segment. We made the right technology choice by promoting PC133 as the next generation memory standard, and we had the right capabilities and resources in place to successfully implement it on both the Socket 370 and Socket A platforms. Our competitors had the same opportunities as we did, but either made the wrong technology choices or were unable to execute on them.

There's no denying that the chipset market is a lot more competitive now than it was last year, but we're still confident that we can continue to remain very competitive. We have the strongest chipset product range in the industry, covering both the Intel and the AMD processor platforms, and continue to drive the introduction of new higher performance technologies such as DDR SDRAM. In addition, we have all the key silicon building blocks in place, including core logic, processors, graphics, and communications and networking, for pushing the development of new more highly integrated products targeted at the value PC and IA segments.

Competition is very healthy for the industry. It drives innovation and gives greater freedom of choice to the consumer. To remain successful, we have to continue to work hard to improve our products, our quality, and our operations. From my own personal experience, I can tell you that the pressure on us to perform is heavier than it has ever been and will get even more intense in the future. I'm certainly not complaining though!

3) On the topic of SMP Athlon systems, does VIA plan on entering the MP Athlon market at all? What about plans to work with AMD's Hammer line of processors? I realize that you cannot comment on unannounced products but are 2, 4 and 8-way MP systems on VIA's chipset roadmap? If so, will you be a launch partner for AMD's Hammer line or do you plan on releasing a chipset after the launch much like the KX133's release?

We think that the current Athlon MP market is being very well served by AMD, so we don't see that it's in the interests of either ourselves or AMD to enter it. We greatly value our close relationship with AMD, and are working with them on developing solutions for the Hammer line. Unfortunately I can't say any more than that at the moment.

4) The VIA/SBLive! compatibility problem caused a great uproar in the community. At Computex you explained to Mike Andrawes and I the problem VIA had asking motherboard manufacturers to comply with your requests to avoid the problem. Could you explain to our readers exactly what caused the situation, what the solution was, and how VIA plans to avoid such situations in the future.

The VIA/SBLive! compatibility issue was caused by an overloading of the PCI bus. We fixed this by advising motherboard manufacturers of a BIOS change and incorporating the fix into the VIA 4in1 drivers available on the web for end users. To prevent such problems in the future we are continuing to strengthen our internal testing procedures as well as working more closely with peripheral suppliers such as Creative to make sure that they include all VIA chipset solutions in their own internal testing procedures. This is very much a two way process, and involves closer communication with our partners in the industry.
The reaction to this issue also taught us that we have to be a lot more responsive to the needs and concerns of the end user community. We are working very hard to improve the quality of web support by improving the quality of information that we publish, answering email enquiries more quickly, and participating more actively in forums and discussion groups.